Shift oddities

Most of the x86 instructions will automatically alter the flags depending on the result. Sometimes this is rather frustrating because you actually what to preserve the flags as long as possible, and sometimes you miss a “mov eax, ecx” which alters the flags. But at least it’s guaranteed that an instruction either sets the flags or it doesn’t touch them, independent of the actual operation… Or is it?

There is the familiy of shift instructions. A “shl eax, cl” will *only* set the sign/zero flags according to the result if cl != 0 (mod 32). Why would anyone want that? Can someone think of a not so artificial situation, where this is useful? And I’m quite sure it is harder to design a processor which handles this special case correctly (let alone pipeline considerations).

Because of this odd behavior, a compiler has to translate

if (a >> b) this(); else that();

to something like

shr eax, cl
test eax, eax
jz bla

And BTW, the rotate instructions never alter the SF/ZF flags.

pixelstats trackingpixel

10 Responses to “Shift oddities”

  1. seppel says:

    And the same also applies to shld/shrd. They are really nops if the shift count is 0.

  2. DrV says:

    The MOV instruction never modifies any flags…

  3. seppel says:

    With ‘sometimes you miss a “mov eax, ecx” which alters the flags’ I meant: There is no mov which alters the flags, but it would be nice to have such an instruction.

  4. myria says:

    You have to remember that this instruction is from the 1980′s. The 8086 was a “true” CISC processor. As far as I remember, the variable shift instruction was actually implemented by doing a single bit shift “cl” times in a loop. Considering that, it’s easy to see how the flags would not change for a zero shift count.

    Modern processors do variable shifts with barrel shifters in a single step. This takes a lot more transistors than were on the 8086.

    myria

  5. seppel says:

    myria, you might be right. The acient implementation of shl x, cl used the already available shl x, 1 instruction:

    For (int i=0; i shl operand, 1 // we have this already
    // and the above shl updates the flags
    }

    So, they didn’t had to update the flags at the end of the operation. This is somehow strange, but I guess if every additional transistor is expensive, it’s logical to use “shl 1″.

  6. seppel says:

    grr… wordpress destroys “less-than”-operators. The for-loop is meant to run as long as i is less than cl. And ‘ancient’ misses an ‘n’.

  7. Madis Kalme says:

    Hmm, sorry, the link doesn’t say it all :)
    I wanted to post a reply to division problem – sorry, this can be deleted

  8. TT says:

    Many of the non-Intel architechtures modify some flags after performing a move or load instuction.

  9. qkejnar says:

    c8wc She was that the soft penis. Can’t you. Tired and making contact with vanished and c8wf clit sucked on his fist.

  10. Yuhong Bao says:

    1970s processors, such as the 8086, are pretty different from 1980s processors, such as the 80286. The former, for example, have no illegal instruction exception handler, while the latter have one.

Leave a Reply

*
To prove you're a person (not a spam script), type the security word shown in the picture. Click on the picture to hear an audio file of the word.
Click to hear an audio file of the anti-spam word